rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a fast, precision comparator ad790 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 features 45 ns max propagation delay single +5 v or dual 6 15 v supply operation cmos or ttl compatible output 250 m v max input offset voltage 500 m v max input hysteresis voltage 15 v max differential input voltage onboard latch 60 mw power dissipation available in 8-pin plastic and hermetic cerdip packages mil-std-883b processing available available in tape and reel in accordance with eia-481a standard applications zero-crossing detectors overvoltage detectors pulse-width modulators precision rectifiers discrete a/d converters delta-sigma modulator a/ds product description the ad790 is a fast (45 ns), precise voltage comparator, with a number of features that make it exceptionally versatile and easy to use. the ad790 may operate from either a single +5 v sup- ply or a dual 15 v supply. in the single-supply mode, the ad790s inputs may be referred to ground, a feature not found in other comparators. in the dual-supply mode it has the unique ability of handling a maximum differential vol tage of 15 v across its input terminals, easing their interfacing to large amplitude and dynamic signals. this device is fabricated using analog devices complementary bipolar (cb) processCwhich gives the ad790s combination of fast response time and outstanding input voltage resolution (1 mv max). to preserve its speed and accuracy, the ad790 incorporates a low glitch output stage that does not exhibit the large current spikes normally found in ttl or cmos out- put stages. its controlled switching reduces power supply distur- bances that can feed back to the input and cause undesired oscillations. the ad790 also has a latching function which makes it suitable for applications requiring synchronous operation. the ad790 is available in five performance grades. the ad790j and the ad790k are rated over the commercial temperature range of 0 c to +70 c. the ad790a and ad790b are rated over the industrial temperature range of C40 c to +85 c. the ad790s is rated over the military temperature range of C55 c to +125 c and is available processed to mil-std-883b, rev. c. product highlights 1. the ad790s combination of speed, precision, versatility and low cost makes it suitable as a general purpose compara- tor in analog signal processing and data acquisition systems. 2. built-in hysteresis and a low-glitch output stage minimize the chance of unwanted oscillations, making the ad790 easier to use than standard open-loop comparators. 3. the hysteresis combined with a wide input voltage range enables the ad790 to respond to both slow, low level (e.g., 10 mv) signals and fast, large amplitude (e.g., 10 v) signals. 4. a wide variety of supply voltages are acceptable for operation of the ad790, ranging from single +5 v to dual +5 v/C12 v, 5 v, or +5 v/ 15 v supplies. 5. the ad7 90s power dissipation is the lowest of any compara- tor in its speed range. 6. the ad790s output swing is symmetric between v logic and ground, thus providing a predictable output under a wide range of input and output conditions. connection diagrams 8-pin plastic mini-dip (n) and cerdip (q) packages output latch ground v logic 1 2 3 45 6 7 8 ad790 + +v s +in ?n ? s 8-pin soic (r) package latch ground v logic +v s 1 2 3 4 5 6 7 8 output ad790 + +in ?n ? s
rev. b C2C ad790Cspecifications dual supply ad790j/a ad790k/b ad790s parameter conditions min typ max min typ max min typ max units response characteristic 100 mv step propagation delay, t pd 5 mv overdrive 40 45 40 45 40 45 ns t min to t max 45/50 45/50 60 ns output characteristics output high voltage, v oh 1.6 ma source 4.65 4.65 4.65 6.4 ma source 4.3 4.45 4.3 4.45 4.3 4.45 v t min to t max 4.3/ 4.3 4.3 4.3 v output low voltage, v ol 1.6 ma sink 0.35 0.35 0.35 v 6.4 ma sink 0.44 0.5 0.44 0.5 0.44 0.5 v t min to t max 0.5/ 0.5 0.5 0.5 v input characteristics offset voltage 1 0.2 1.0 0.05 0.25 0.2 1.0 mv t min to t max 1.5 0.5 1.5 mv hysteresis 2 t min to t max 0.3 0.4 0.6 0.3 0.4 0.5 0.3 0.4 0.65 mv bias current either input 2.5 5 1.8 3.5 2.5 5 m a t min to t max 6.5 4.5 7 m a offset current 0.04 0.25 0.02 0.15 0.04 0.25 m a t min to t max 0.3 0.2 0.4 m a power supply rejection ratio dc v s 20% 80 90 88 100 80 90 db t min to t max 76 88 85 93 76 85 db input voltage range differential voltage v s 15 v 6 v s 6 v s 6 v s v common mode Cv s +v s C2 v Cv s +v s C2 v Cv s +v s C2 v v common mode rejection ratio C10 v single supply ad790j/a ad790k/b ad790s parameter conditions min typ max min typ max min typ max units response characteristic 100 mv step propagation delay, t pd 5 mv overdrive 45 50 45 50 45 50 ns t min to t max 50/60 50/60 65 ns output characteristics output high voltage, v oh 1.6 ma source 4.65 4.65 4.65 6.4 ma source 4.3 4.45 4.3 4.45 4.3 4.45 v t min to t max 4.3 4.3 4.3 v output low voltage, v ol 1.6 ma sink 0.35 0.35 0.35 v 6.4 ma sink 0.44 0.5 0.44 0.5 0.44 0.5 v t min to t max 0.5 0.5 0.5 v input characteristics offset voltage 2 0.45 1.5 0.35 0.6 0.45 1.5 mv t min to t max 2.0 0.85 2.0 mv hysteresis 3 t min to t max 0.3 0.5 0.75 0.3 0.5 0.65 0.3 0.7 1.0 mv bias current either input 2.7 5 2.0 3.5 2.7 5 m a t min to t max 7 58 m a offset current 0.04 0.25 0.02 0.15 0.04 0.25 m a t min to t max 0.3 0.2 0.4 m a power supply rejection ratio dc 4.5 v v s 5.5 v 80 90 86 100 80 90 db t min to t max 76/ 76 88 82 93 76 85 db input voltage range differential voltage 6 v s 6 v s 6 v s v common mode 0 +v s C2 v 0 +v s C2 v 0 +v s C2 v v input impedance 20 i 220 i 220 i 2m w i pf latch characteristics latch hold time, t h 25 35 25 35 25 35 ns latch setup time, t s 510 510 510 ns low input level, v il t min to t max 0.8 0.8 0.8 v high input level, v ih t min to t max 1.6 1.6 1.6 v latch input current 2.3 5 2.3 3.5 2.3 5 m a t min to t max 7 58 m a supply characteristics supply voltage 4 t min to t max 4.5 7 4.5 7 4.7 7 v quiescent current 10 12 10 12 10 12 ma power dissipation 60 60 60 mw temperature range rated performance t min to t max 0 to +70/C40 to +85 0 to +70/C40 to +85 C55 to +125 c notes 1 pin 1 tied to pin 8, and pin 4 tied to pin 6. 2 defined as the average of the input voltages at the low to high and high to low transition points. refer to figure 14. 3 defined as half the magnitude between the input voltages at the low to high and high to low transition points. refer to figure 14. 4 Cv s must not be connected above ground. all min and max specifications are guaranteed. specifications shown in boldface are tested on all production units at final test. specifications subject to change without notice. ad790 rev. b C3C (operation @ +25 8 c and +v s = v logic = +5 v, Cv s = 0 v unless otherwise noted) 1
ad790 rev. b C4C absolute maximum ratings 1, 2 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v internal power dissipation 2 . . . . . . . . . . . . . . . . . . . 500 mw differential input voltage . . . . . . . . . . . . . . . . . . . . . 16.5 v output short circuit duration . . . . . . . . . . . . . . . . indefinite storage temperature range (n, r) . . . . . . . . . . . . . . . . . . . . . . . . . . . C65 c to +125 c (q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C65 c to +150 c lead temperature range (soldering 60 sec) . . . . . . . +300 c logic supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 v metalization photograph contact factory for latest dimensions. dimensions shown in inches and (mm). call factory for chip specifications. ad790 0.1? 0.1? 0.1? 15v + +in ?n 5v + 510 output 15v latch (optional) 8 1 5 7 6 4 3 2 w figure 1. basic dual supply configuration (n, q package pinout) notes 1 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 thermal characteristics: plastic n-8 package: q ja = 90 c/watt; ceramic q-8 package: q ja = 110 c/watt, q jc = 30 c/watt. soic (r-8) package: q ja = 160 c watt; q jc = 42 c/watt. ordering guide temperature package package model range description option ad790jn 0 c to +70 c plastic dip n-8 ad790jr 0 c to +70 c soic so-8 ad790jr-reel 0 c to +70 c reel ad790jr-reel7 0 c to +70 c soic r-8 ad790kn 0 c to +70 c plastic dip n-8 ad790aq C40 c to +85 c cerdip q-8 ad790bq C40 c to +85 c cerdip q-8 ad790sq C55 c to +125 c cerdip q-8 ad790sq/883b C55 c to +125 c cerdip q-8 ad790s chips C55 c to +125 c die ad790 1 2 3 4 5 6 7 8 0.1? +in ?n 5v + output latch (optional) 510 w figure 2. basic single supply configuration (n, q package pinout) ad790 1 2 3 4 5 6 7 8 +5v +15v ?5v tek 7904 scope 5v voltage source 10 w ?mv 0.1? ?00mv ?.3v ?.7v ?v hp8112 pulse generator 1k hp2835 mps 571 0.1? 0.1? 0.1? 10k w 650 w 400 w 50 w 25 w 130 w figure 3. response time test circuit (n, q package pinout)
typical characteristicsCad790 rev. b C5C figure 5. propagation delay vs. load capacitance figure 8. propagation delay vs. temperature figure 11. total supply current vs. temperature figure 6. propagation delay vs. fanout (lsttl and cmos) 06 410 0.8 0.7 0.6 0.5 0.4 0.2 0.1 0.3 0.0 28 i sink ? ma temp = +25? output low voltage ?volts figure 9. output low voltage vs. sink current input t h latch t s output t pd 0 v ih v il v oh v ol t s = setup time t h = hold time t pd = comparator response time figure 12. latch timing figure 4. propagation delay vs. overdrive figure 7. propagation delay vs. source resistance 06 410 5.0 4.9 4.8 4.7 4.6 4.4 4.3 4.5 4.2 28 temp = +25? output low voltage ?volts i source ?ma figure 10. output high voltage vs. source current
ad790 rev. b C6C circuit description the ad790 possesses the overall characteristics of a standard monolithic comparator: differential inputs, high gain and a logic output. however, its function is implemented with an architec- ture which offers several advantages over previous comparator designs. specifically, the output stage alleviates some of the limi- tations of classic ttl comparators and provides a symmetric output. a simplified representation of the ad790 circuitry is shown in figure 13. a1 a2 av output gain stage output stage q2 q1 + + + in + in v logic gnd figure 13. ad790 block diagram the output stage takes the amplified differential input signal and converts it to a single-ended logic output. the output swing is defined by the pull-up pnp and the pull-down npn. these pro- duce inherent rail-to-rail output levels, compatible with cmos logic, as well as ttl, without the need for clamping to internal bias levels. furthermore, the pull-up and pull-down levels are symmetric about the center of the supply range and are refer- enced off the v logic supply and ground. the output stage has nearly symmetric dynamic drive capability, yielding equal rise and fall times into subsequent logic gates. unlike classic ttl or cmos output stages, the ad790 circuit does not exhibit large current spikes due to unwanted current flow between the output transistors. the ad790 output stage has a controlled switching scheme in which amplifiers a1 and a2 drive the output transistors in a manner designed to reduce the current flow between q1 and q2. this also helps minimize the disturbances feeding back to the input which can cause troublesome oscillations. the output high and low levels are well controlled values de- fined by v logic (+5 v), ground and the transistor equivalent schottky clamps and are compatible with ttl and cmos logic requirements. the fanout of the output stage is shown in figure 6 for standard lsttl or hcmos gates. output drive behavior vs. capacitive load is shown in figure 5. hysteresis the ad790 uses internal feedback to develop hysteresis about the input reference voltage. figure 14 shows how the input off- set voltage and hysteresis terms are defined. input offset voltage (v os ) is the difference between the center of the hysteresis range and the ground level. this can be either positive or nega- tive. the hysteresis voltage (v h ) is one-half the width of the v oh v ol h v = hysteresis voltage h v 0 h v v out in + v os v os = input offset voltage 2 3 7 in + out v gnd figure 14. hysteresis definitions (n, q package pinout) hysteresis range. this built-in hysteresis allows the ad790 to avoid oscillation when an input signal slowly crosses the ground level. supply voltage connections the ad790 may be operated from either single or dual supply voltages. internally, the v logic circuitry and the analog front- end of the ad790 are connected to separate supply pins. if dual supplies are used, any combination of voltages in which +v s 3 v logic C 0.5 v and Cv s 0 may be chosen. for single supply operation (i.e., +v s = v logic ), the supply voltage can be oper- ated between 4.5 v and 7 v. figure 15 shows some other ex- amples of typical supply connections possible with the ad790. bypassing and grounding although the ad790 is designed to be stable and free from os- cillations, it is important to properly bypass and ground the power supplies. ceramic 0.1 m f capacitors are recommended and should be connected directly at the ad790s supply pins. these capacitors provide transient currents to the device during comparator switching. the ad790 has three supply voltage pins, +v s , Cv s and v logic . it is important to have a common ground lead on the board for the supply grounds and the gnd pin of the ad790 to provide the proper return path for the sup- ply current. latch operation the ad790 has a latch function for retaining input information at the output. the comparator decision is latched and the output state is held when pin 5 is brought low. as long as pin 5 is kept low, the output remains in the high or low state, and does not respond to changing inputs. proper capture of the in- put signal requires that the timing relationships shown in fig- ure 12 are followed. pin 5 should be driven with cmos or ttl logic levels. the output of the ad790 will respond to the input when pin 5 is at a high logic level. when not in use, pin 5 should be con- nected to the positive logic supply. when using dual supplies, it is recommended that a 510 w resistor be placed in series with pin 5 and the driving logic gate to limit input currents during power up.
ad790 rev. b C7C ad790 1 2 3 4 5 6 7 8 +in ?n 5v + out 510 w + 12v 0.1? 0.1? +v s = +12v, ? s = 0v v logic = +5v ad790 1 2 3 4 5 6 7 8 5v + out 15v 0.1? 0.1? +v s = +5v, ? s = ?5v v logic = +5v +in ?n ad790 1 2 3 4 5 6 7 8 5v + out 5v 0.1? 0.1? +in ?n +v s = +5v, ? s = ?v, v logic = +5v figure 15. typical power supply connections (n, q package pinout) window comparator for overvoltage detection the wide differential input range of the ad790 makes it suit- able for monitoring large amplitude signals. the simple over- voltage detection circuit shown in figure 16 illustrates direct connection of the input signal to the high impedance inputs of the comparator without the need for special clamp diodes to limit the differential input voltage across the inputs. 510 w overrange = 1 7432 ad790 1 2 3 4 5 6 7 8 +15v +5v ?5v ad790 1 2 3 4 5 6 7 8 +15v +5v ?5v v in 510 w 0.1? 0.1? 0.1? 0.1? 0.1? 0.1? sign 1 = high 0 = low ?.5v +7.5v figure 16. overvoltage detector (n, q package pinout) single supply ground referred overload detector the ad790 is useful as an overload detector for sensitive loads that must be powered from a single supply. a simple ground referenced overload detector is shown in figure 16. the com- parator senses a voltage across a pc board trace and compares that to a reference (trip) voltage established by the comparators minus supply current through a 2.7 w resistor. this sets up a applying the ad790 C7C 10 mv reference level that is compared to the sense voltage. the minus supply current is proportional to absolute tempera- ture and compensates for the change in the sense resistance with temperature. the width and length of the pc board trace determine the resistance of the trace and consequently the trip current level. i limit = 10 mv/r sense r sense = rho (trace length/trace width) rho = resistance of a unit square of trace l o a d 2.7 pc board trace ad790 1 2 3 4 5 6 7 8 0.1? 5v + output r sense ? 10mv/100ma +v s 510 w w figure 17. ground referred overload detector circuit (n, q package pinout) precision full-wave rectifier the high speed and precision of the ad790 make it suitable for use in the wide dynamic range full-wave rectifier shown in fig- ure 18. this circuit is capable of rectifying low level signals as small as a few mv or as high as 10 v. input resolution, propaga- tion delay and op amp settling will ultimately limit the max imum input frequency for a given accuracy level. total comparator plus switch delay is approximately 100 ns, which limits the maximum input frequency to 1 mhz for clean rectification. ad711 10k fet switches the gain from +1 to ? 20k 10k ad790 1 2 3 4 5 6 7 8 +15v +5v ?5v 2 3 4 6 7 +15v ?5v v in v out nmos fet (r on < 20 ) 0.1? 510 0.1? 0.1? 0.1? 0.1? w w w w w figure 18. precision full-wave rectifier (n, q package pinout)
ad790 rev. b C8C c1323C10C10/89 printed in u.s.a. 2 3 1 4 6 7 5 8 ttl level output 400 * 5v + gnd standard schottky diode 1k a resistor up to 10k maybe used to reduce the source and sink current of the driver. however, this will slightly lower the maximum usable clock rate. * bipolar signal input 4.7v 0.3v 5v w w w figure 19. a bipolar to cmos ttl line receiver (n, q package pinout) bipolar to cmos/ttl it is sometimes desirable to translate a bipolar signal (e.g., 5 v) coming from a communications cable or another section of the system to cmos/ttl logic levels; such an application is referred to as a line receiver. previously, the interface to the bi- polar signal required either a dual ( ) power supply or a refer- ence voltage level about which the line receiver would switch. the ad790 may be used in a simple circuit to provide a unique capability: the ability to receive a bipolar signal while powered from a single +5 v supply. other comparators cannot perform this task. figure 19 shows a 1 k w resistor in series with the input signal which is then clamped by a schottky diode, holding the input of the comparator at 0.4 v below ground. although the comparator is specified for a common mode range down to Cv s , (in this case ground) it is permissible to bring one of the inputs a few hundred mv below ground. the comparator switches around this level and produces a cmos/ttl compatible swing. the circuit will operate to switching frequencies of 20 mhz. outline dimensions dimensions shown in inches and (mm). 8-pin plastic mini-dip (n-8) package 8-pin cerdip (q-8) package soic (so-8) package
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